The display of images and full-motion video is an area of the electronics industry improving with great progress in recent years. The display and rendering of high-quality video, particularly high-definition digital video, is a primary goal of modern video technology applications and devices. Video technology is used in a wide variety of products ranging from cellular phones, personal video recorders, digital video projectors, high-definition televisions, and the like. The emergence and growing deployment of devices capable of high-definition video generation and display is an area of the electronics industry experiencing a large degree of innovation and advancement.
The video technology deployed in many consumer electronics-type and professional level devices relies upon one or more video processors to format and/or enhance video signals for display. This is especially true for digital video applications. For example, one or more video processors are incorporated into a typical set top box and are used to convert HDTV broadcast signals into video signals usable by the display. Such conversion involves, for example, scaling, where the video signal is converted from a non-16×9 video image to a image that can be properly displayed on a true 16×9 (e.g., widescreen) display. One or more video processors can be used to perform scan conversion, where a video signal is converted from an interlaced format, in which the odd and even scan lines are displayed separately, into a progressive format, where an entire frame is drawn in a single sweep.
Additional examples of video processor applications include, for example, signal decompression, where video signals are received in a compressed format (e.g., MPEG-4, H264, H263, etc.) and are decompressed and formatted for a display. Another example is re-interlacing scan conversion, which involves converting an incoming digital video signal from a DVI (Digital Visual Interface) format to a composite video format compatible with the vast number of older television displays installed in the market.
More sophisticated users require more sophisticated video processor functions, such as, for example, In-Loop/Out-of-loop deblocking filters, advanced motion adaptive de-interlacing, input noise filtering for encoding operations, polyphase scaling/re-sampling, sub-picture compositing, and processor-amplifier operations such as, color space conversion, adjustments, pixel point operations (e.g., sharpening, histogram adjustment etc.) and various video surface format conversion operations.
One of the more popular features for incorporation into modern video processors is the implementation of powerful real-time video compression. Video compression, or video encoding, typically operates on square-shaped groups of neighboring pixels, often called “macro blocks.” These pixel groups, or macro blocks, are compared from one frame to the next, or within the same frame, and the video compression codec (e.g., for an encode-decode scheme) sends only the differences within those blocks. This works extremely well if the video has small on amounts of motion. A still frame of text, for example, can be repeated with very little transmitted data. In areas of video with more motion, more pixels change from one frame to the next, and thus, the video compression scheme must send more data to keep up with the larger number of pixels that are changing.
Typically, some of the most compelling content can have very intense action scenes (e.g., large amounts of motion, explosions, special effects etc.). It takes a very powerful video processing architecture to handle such intense video. Such video typically has a great deal of high frequency detail, and in order to maintain the frame rate, the video processor needs to either decrease the quality of the video, or increase the bit rate of the video to render this added information with the same level of detail.
Engineers have turned to hardware-based encoding solutions, where the computations needed to encode real-time full motion video are implemented in hardware-based logic. The hardware-based implementation is designed to provide sufficient power and efficiency given the time constraints of real-time video encoding, power consumption requirements (especially for mobile devices), silicon die space requirements, and the like.
The problem with providing such sophisticated hardware based video encoding functionality is the fact that a video processor needs to deliver acceptable performance and under conditions where the encoding format is variable (e.g., varying encoding standards, varying slicing map specifications, etc.). Having a sufficiently powerful architecture to implement such encoding functions can be excessively expensive for many types of devices. The more sophisticated the video processing functions, the more expensive, in terms of silicon die area, transistor count, memory speed requirements, etc., the integrated circuit device required to implement such functions.
Thus what is needed, is a new video encoding system that overcomes the limitations on the prior art. The new video encoding system should be capable of dealing with varying encoding formats and have a high encoding performance to handle the sophisticated video functions expected by increasingly sophisticated users.